SME
Computer Organization & Architecture · Problem type
The single-cycle clock from unit delays
Use this for “The units take 0.2, 0.1, 0.2, 0.2 and 0.1 ns. What clock can a single-cycle CPU run?”
Diagram
load
0.8,
store
0.7,
R-type
0.6,
branch
0.5
ns:
the
slowest,
0.8
ns,
sets
the
period.
f
=
1
0.8
ns
=
1.25
GHz.
This is an example. Type your own values to start a new problem.
T (ns)
=
tIM (ns)
+
treg (ns)
+
tALU (ns)
+
tDM (ns)
+
tWB (ns)
f
Clock rate
calculated
Formulas
T
=
tIM
+
treg
+
tALU
+
tDM
+
tWB
0.8 = 0.2 + 0.1 + 0.2 + 0.2 + 0.1
f
=
1
T
1.25
=
1
0.8
Assumptions
•
Single-cycle: every instruction finishes in one clock cycle, so the cycle must fit the slowest.
•
A load uses all five units one after another, so it is the slowest class.
•
Wires, multiplexers and register setup are counted inside the unit delays.
Step-by-step
WE KNOW
tIM = 0.2 ns, treg = 0.1 ns, tALU = 0.2 ns, tDM = 0.2 ns, tWB = 0.1 ns
FIND
clock period (T), clock rate (f)
Step 1 · Find clock period (T)
Use T = tIM + treg + tALU + tDM + tWB
The period is the load’s path: all five units, one after another.
T
=
0.2
+
0.1
+
0.2
+
0.2
+
0.1
T
=
0.8
ns
Step 2 · Find clock rate (f)
Use f = 1 ÷ T
The
clock
rate
is
one
over
the
period;
1
1
ns
is
1
GHz.
f
=
1
0.8
f
=
1.25
GHz
Check
Put the numbers back in. Both sides should match.
0.8 = 0.2 + 0.1 + 0.2 + 0.2 + 0.1 ✓
1.25
=
1
0.8
✓
Topic check
See what you know: 5 questions on this topic
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